VLSI Research at Oklahoma State University Open-sourcing Tools for VLSI

Who are we? We are a research group at Oklahoma State University that specialize in the area of Very Large Scale Integration (VLSI), computer architecture/arithmetic, memory architectures, and Electronic Design Automation (EDA) design flows.
Skywater Technology has started a process thanks to partners Efabless and Google to revolutionize how we make semiconductors. The process here is an attempt to provide a simple way to make a semiconductors using open-source tools. In other words, we are democratizing hardware design through open-source chip design tools and methodology.
GlobalFoundries has also partnered with Google to revolutionize how we make semiconductors with open-source tools.
For this process we have created several tools that help with this process. We welcome your feedback as well as any comments to help with this process.
- Overview
- Tutorial for Layout with Magic
- YouTube Presentation on SKY130 standard-cells
- [RVSoCD - RISC-V System-on-Chip Design textbook]
- RVSoCD Webpage - new System on Chip textbook published by Elsevier
- RVSoCD at Amazon Purchase through Amazon
- RVSoCD at Elsevier Elsevier’s Site
- Wally RISC-V Architecture - partnership with Harvey Mudd College and UNLV on a configurable RISC-V architecture with many extensions (OpenHW Group Addition)
- CharLib - Python-based Characterization Tool for use with standard-cell libraries
- Drop-In-JTAG - a lightweight, modular JTAG debugging interface that can be easily integrated into an existing HDL design to provide immediate boundary scan and debugging capability with minimal modification to the original processor or system architecture.
- [Oklahoma State University (OSU) Standard Cell Libraries originally done for MOSIS SCMOS]
- [Oklahoma State University (OSU) Standard Cell Libraries work for Semiconductor Research Corporation (SRC)]
- [Oklahoma State University (OSU) Standard Cell Libraries for SKY130]
- [Oklahoma State University (OSU) Standard Cell Libraries for SKY130 Radiation Hardened by Design (RHBD)]
- [Oklahoma State University (OSU) Standard Cell Libraries for GF180]
- Prefix Adder Generation - understanding prefix adders and sparsity better as well as HDL generation (a tool made by our Ph.D. candidate Teo Ene)
- Stick Diagramming Tool - made by Nick Overacker who took our VLSI class and made a super tool!
- AES Implementations in SystemVerilog - open-source implementations of AES by our Ph.D. candidate Ryan Swann
- DES Implementations in SystemVerilog - open-source implementations in SystemVerilog for S-DES and DES used in Digital Logic Design courses at Oklahoma State University.
- Resources
If anything here is confusing (or wrong!), or if we have missed important details, please contact us.